The Peripheral Component Interconnect express (PCIe) is a component-level interconnect standard that defines a bidirectional communication protocol for transactions between input/output (I/O) adapters and host systems. PCIe communications are encapsulated in packets according to the PCIe standard for transmission on a PCIe bus. Transactions originating at input/output (I/O) adapters and ending at host systems are referred to as up-bound transactions. Transactions originating at host systems and terminating at I/O adapters are referred to as down-bound transactions. The PCIe topology is based on point-to-point unidirectional links that are paired (e.g., one up-bound link, one down-bound link) to form the PCIe bus. The PCIe standard is maintained and published by the Peripheral Component Interconnect Special Interest Group (PCI-SIG).
Many input/output protocols require end-to-end data protection, including, for instance, FICON®, T11, T10 DIF, etc. Better data protection could be achieved by moving the generation and checking closer to the application. Software generation and checking would be closest to the application, but could impose performance and CPU utilization penalties. Existing solutions typically provide the checking offloaded into the adapter. For instance, a checksum offload may be provided. However, this has certain deficiencies, including, the end checking being further from the application. Further, the adapters available in the industry do not support all checking protocols, such as FICON® Cyclic Redundancy Check (CRC).